The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a semiconductor structure including a deep trench capacitor having an increased total capacitance.
Deep trench (DT) capacitors can be used as memory elements in semiconductor structures. More specifically, embedded dynamic random access memory (eDRAM) devices may utilize deep trenches as memory elements. However, as semiconductor technology improves and eDRAM devices continue to become smaller in size, fabrication of (DT) capacitors has become more difficult. Further, and with this scaling, the top down surface area of the eDRAM is reduced. Thus, and in order to keep the same capacitance, the DT capacitor, to which a bit is written, must be made deeper and/or filled with a high dielectric constant dielectric material. There is however a limit on how large the dielectric constant of the dielectric material can be made, and how deep the DT can be etched. There is thus a need for providing an eDRAM having improved cell capacitance as the bit size cell is scaled down.